Search results for "CMOS technology"
showing 4 items of 4 documents
Memory cell structure integrated on semiconductor
2004
This invention relates to a memory cell Which comprises a capacitor having a ?rst electrode and a second electrode separated by a dielectric layer. Such dielectric layer com prises a layer of a semi-insulating material Which is fully enveloped by an insulating material and in Which an electric charge is permanently present or trapped therein. Such electric charge accumulated close to the ?rst or to the second electrode, depending on the electric ?eld betWeen the electrodes,therebyde?ningdifferentlogiclevels.
A Design Methodology for Low-Power MCML Ring Oscillators
2007
In this paper, a low-power design method for MCML based ring oscillators is presented. The proposed method takes into account the parasitic capacitances of the MOS transistors. To validate it, some ring oscillators with different oscillation frequencies were designed in a 0.18 mum CMOS technology. SPICE simulations demonstrate the effectiveness of the design method.
Toward Quaternary QCA : Novel Majority and XOR Fuzzy Gates
2022
As an emerging nanotechnology, quantum-dot cellular automata (QCA) has been considered an alternative to CMOS technology that suffers from problems such as leakage current. Moreover, QCA is suitable for multi-valued logic due to the simplicity of implementing fuzzy logic in a way much easier than CMOS technology. In this paper, a quaternary cell is proposed with two isolated layers because of requiring three particles to design this quaternary cell. Moreover, due to the instability of the basic gates, the three particles cannot be placed in one layer. The first layer of the proposed two-layer cell includes a ternary cell and the second one includes a binary cell. It is assumed that the over…
Conception en technologie CMOS d'un Système de Vision dédié à l'Imagerie Rapide et aux Traitements d'Images
2008
Our work presented in this thesis focuses on the design, testing and implementation of monolithics CMOS image smart sensors : The principle, performance and limitations. The hardware implementation of a vision smart system is the central link. HISIC is High Speed Image Capture with processing at pixel level. An experimental platform for instrumentation and evaluation of retina operators was conducted during this thesis. After a state of the smart sensors and CMOS retinas, the second part is dedicated to the study and design of the pixel image sensor HISIC. Two circuits were realized in CMOS technology. The first identied a new type of photo-detector, and the second, to create a prototype em…